What is a FET? FET Transistor Basics, Construction, Symbols, Characteristics Curves, and Types

What is a FET? FET is an electronics component that is used in many electronic circuits and appliances. FET is a three-terminal Three layers device used for switching purposes like BJT transistor. FET stands for Field Effect Transistor. Learn the FET Transistor basics in this article.

What is the Difference Between Bipolar Transistors and Field-Effect Transistors (FET)?

  1. The main difference between the BJT transistor and FET transistor is the controlling parameter. BJT is current controlled device while FET is a voltage-controlled device.
  2. BJT is a bipolar device where the FET is a unipolar device. Bipolar means that current in BJT flow due to electrons and holes. Where a unipolar means that the FET is current is due to either electrons or holes.

FET Transistor Basics

We are familiar with the concept that a static charge produces an electric field around itself. The electric field can pull other charges. The same phenomenon can happen inside the semiconductor. The electric field inside the semiconductor channel can attract charges and control the path of conduction inside the channel.

FET Construction

The construction of n-channel JFET has three terminals and two junctions. The major portion of the structure consists of n-type material for n-channel JFET. The two P-type materials are deposited on both sides of the n-channel that form two PN junctions. Where the deposition is made, the n-channel area for conduction reduces. Both sides of the n-channel are connected to the electrodes. One terminal is drain and another terminal is the source. Where both P-type materials are connected to the gate terminal. The gate terminal is the controlling terminal of the source to drain the current.

FET Transistor Basics and Construction Diagram
FET Construction Diagram

How Does a FET Work?

Let discuss the FET working for different cases of gate and source-drain input. Consider the following cases.

  1. No Gate input
  2. Negative Voltage at Gate

No Gate Input VGS=0

For the n-channel JFET, suppose a positive drain to source voltage V­DS is applied. And the input at the gate to source voltage VGS is zero volts. The PN junction between the gate and n-channel is reverse bias and forms a depletion region around the junction. For the drain to source voltage VDS the drain current ID will flow limited only by the n-channel ohmic resistance.

FET Biasing diagram and Working
FET Biasing and Working Diagram

By increasing the drain to source voltage VDS from zero voltage, the drain current ID will increase. The current at this stage can be determined by ohm law. Due to the increasing reverse voltage the depletion region will become wider. At some point at few voltages of VDS the depletion region will become so wider that there will increase in current for an increase in voltage. That value of VDS is called pinch-off voltage V­P. Further increase in VDS will not increase the current ID. This maximum current of ID is called IDSS.

Negative gate voltage input VGS<0

By applying the negative gate voltage input of the gate to source voltage VGS different curves are obtained. For different VGS the similar characteristics of JFET can be obtained but having lower drain current. This means for more VGS the pinch-off voltage will reach faster and IDSS will be lower. The amount of VGS that results in zero drain current is called pinch-off voltage denoted by VGS(off). The region at the left of the pinch-off voltage locus is the linear region for amplification.

FET VI Characteristics Curves
VI Characteristics Curves of FET

Voltage Controlled Variable Resistor

The region at the left of the pinch-off voltage and locus curve is called the ohmic region or voltage-controlled resistor. In this region, the JFET can work as a voltage-controlled variable resistor.

FET Symbols

The FET symbol has three terminals gate, drain, and source. The gate is highlighted by the arrowhead. Where the arrowhead points the convention current if the PN junction is forward bias.

FET Symbol and Pinout diagram
n-Channel FET Symbol

Types of FETs

FET can be categorized in different ways. All the types of FET are covered in the following FET tree diagram.

FETs are mainly categorized in junction and insulated gate type FETs.

Types of FET tree diagram
Types of FETs

JFET Transistor

JFET transistor refers to the FET that has a junction between the gate and channel. The drain current is controlled by the reverse bias of the junction. The JFET can be further divided into n-channel and p-channel devices.

Insulated Gate FET IGFET or Metal Oxide Silicon FET MOSFET

Insulated Gate FET is a broad category where Metal Oxide Silicon FET MOSFET is the most know insulated gate FET available in the market. MOSFET has the metal oxide over the silicon substrate to construct FET for insulation purposes. The most prominent feature of MOSFET is the high input impedance.

Dual Gate MOSFET

Dual Gate MOSFET uses two gates along the channel to improve the performance of RF signals. The second gate provides more insulation. The dual-gate MOSFET can be used for mixing and multiplication purposes.

Meta Silicon FET MESFET

Meta Silicon FET MESFET is fabricated using the Gallium arsenide and used for RF applications. It can provide high gain and low noise. MESFET has a very small gate structure therefore it’s very risky while handing the MESFET.


HEMT / PHEMT is High Electron Mobility Transistors or Paedomorphic High Electron Mobility Transistors are JFET modifications for higher frequency and high-performance applications.


FINFET is used inside the integrated circuit due to its smaller size. For the higher component density of IC FINFET is used more widely.


VMOS stands for vertical Metal Oxide Silicon. VMOS can improve the current flow in the vertical direction. VMOS FET is used for power electronics applications.

Leave a Comment